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www.irf.com 1 02/19/07 IRF6712SPBF irf6712strpbf directfet power mosfet description the IRF6712SPBF combines the latest hexfet? power mosfet silicon technology with the advanced directfet tm packaging to achieve the lowest on-state resistance in a package that has the footprint of a micro-8 and only 0.7 mm profile. the directfet package is compatible with existing layout geometries used in power applications, pcb assembly equipment and vapor phase, infra-red or con vection soldering techniques, when application note an-1035 is followed regarding the manufacturing methods and processes. the directfe t pack- age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. the IRF6712SPBF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction a nd switching losses. the reduced total losses make this product ideal for high efficiency dc-dc converters that power the latest g eneration of processors operating at higher frequencies. the IRF6712SPBF has been optimized for parameters that are critical in synchronous buck operating from 12 volt bus converters including rds(on) and gate charge to minimize losses . applicable directfet outline and substrate outline (see p.7,8 for details) fig 1. typical on-resistance vs. gate voltage

fig 2. typical total gate charge vs gate-to-source voltage click on this section to link to the appropriate technical paper. click on this section to link to the directfet website. surface mounted on 1 in. square cu board, steady state. t c measured with thermocouple mounted to top (drain) of part. repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 0.14mh, r g = 25 ? , i as = 13a. directfet isometric sq sx st mq mx mt mp rohs compliant containing no lead and bromide low profile (<0.7 mm) dual sided cooling compatible ultra low package inductance optimized for high frequency switching ideal for cpu core dc-dc converters optimized for both sync.fet and some control fet application low conduction and switching losses compatible with existing surface mount techniques 100% rg tested 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 v gs, gate -to -source voltage (v) 0 2 4 6 8 10 12 t y p i c a l r d s ( o n ) ( m ? ) i d = 17a t j = 25c t j = 125c 0246810121416 q g total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 20v v ds = 13v i d = 13a q g tot q gd q gs2 q rr q oss v gs(th) 13nc 4.4nc 1.7nc 14nc 10nc 1.9v absolute maximum ratin g s parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t a = 25c continuous drain current, v gs @ 10v i d @ t a = 70c continuous drain current, v gs @ 10v a i d @ t c = 25c continuous drain current, v gs @ 10v i dm pulsed drain current e as single pulse avalanche energy mj i ar avalanche current a 13 max. 13 68 130 20 25 17 13 v dss v gs r ds(on) r ds(on) 25v max 20v max 3.8m ? @ 10v 6.7m ? @ 4.5v

2 www.irf.com pulse width 400s; duty cycle 2%. static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 25 ??? ??? v ? v dss / ? t j breakdown voltage temp. coefficient ??? 18 ??? mv/c r ds(on) static drain-to-source on-resistance ??? 3.8 4.9 m ? ??? 6.7 8.7 v gs(th) gate threshold voltage 1.4 1.9 2.4 v ? v gs(th) / ? t j gate threshold voltage coefficient ??? -6.1 ??? mv/c i dss drain-to-source leakage current ??? ??? 1.0 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 40 ??? ??? s q g total gate charge ??? 13 20 q gs1 pre-vth gate-to-source charge ??? 3.1 ??? q gs2 post-vth gate-to-source charge ??? 1.7 ??? nc q gd gate-to-drain charge ??? 4.4 ??? q godr gate charge overdrive ??? 3.8 ??? see fig. 15 q sw switch charge (q gs2 + q gd ) ??? 6.1 ??? q oss output charge ??? 10 ??? nc r g gate resistance ??? 1.7 3.0 ? t d(on) turn-on delay time ??? 12 ??? t r rise time ??? 57 ??? ns t d(off) turn-off delay time ??? 13 ??? t f fall time ??? 6.2 ??? c iss input capacitance ??? 1570 ??? c oss output capacitance ??? 490 ??? pf c rss reverse transfer capacitance ??? 210 ??? diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 17 (body diode) a i sm pulsed source current ??? ??? 2.7 (body diode) v sd diode forward voltage ??? 0.81 1.0 v t rr reverse recovery time ??? 17 26 ns q rr reverse recovery charge ??? 14 21 nc mosfet symbol clamped inductive load v ds = 13v, i d = 13a conditions ? = 1.0mhz v ds = 16v, v gs = 0v v gs = 20v v gs = -20v v ds = 25v, v gs = 0v v ds = 13v v ds = 25v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 17a
v gs = 4.5v, i d = 13a
v ds = v gs , i d = 50a t j = 25c, i f = 13a v gs = 4.5v i d = 13a v gs = 0v v ds = 13v i d = 13a v dd = 13v, v gs = 4.5v
di/dt = 200a/s
t j = 25c, i s = 13a, v gs = 0v
showing the integral reverse p-n junction diode.

www.irf.com 3 fig 3. maximum effective transient thermal impedance, junction-to-ambient used double sided cooling , mounting pad with large heatsink. mounted on minimum footprint full size board with metalized back and with small clip heatsink. r is measured at
surface mounted on 1 in. square cu (still air).

with small clip heatsink (still air) mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthja + tc j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci= i / ri ci= i / ri 4 4 r 4 r 4 a a 5 5 r 5 r 5 ri (c/w) i (sec) 1.61955 0.000126 2.14056 0.001354 22.2887 0.375850 20.0457 7.41 11.9144 99 absolute maximum ratin g s parameter units p d @t a = 25c power dissipation w p d @t a = 70c power dissipation p d @t c = 25c power dissipation t p peak soldering temperature c t j operating junction and t stg storage temperature range thermal resistance parameter typ. max. units r ja junction-to-ambient ??? 58 r ja junction-to-ambient 12.5 ??? r ja junction-to-ambient 20 ??? c/w r jc junction-to-case ??? 3.5 r j-pcb junction-to-pcb mounted 1.0 ??? linear derating factor w/c 0.017 270 -40 to + 150 max. 36 2.2 1.4

4 www.irf.com fig 5. typical output characteristics fig 4. typical output characteristics fig 6. typical transfer characteristics fig 7. normalized on-resistance vs. temperature fig 8. typical capacitance vs.drain-to-source voltage fig 9. typical on-resistance vs. drain current and gate voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v 60s pulse width tj = 150c vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.8v bottom 2.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.8v bottom 2.5v 60s pulse width tj = 25c 2.5v 1 2 3 4 5 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 150c t j = 25c t j = -40c v ds = 15v 60s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.5 1.0 1.5 2.0 t y p i c a l r d s ( o n ) ( n o r m a l i z e d ) i d = 17a v gs = 10v v gs = 4.5v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 50 100 150 i d , drain current (a) 0 5 10 15 20 25 t y p i c a l r d s ( o n ) ( m ? ) t j = 25c vgs = 4.0v vgs = 4.5v vgs = 5.0v vgs = 10v

www.irf.com 5 fig 13. typical threshold voltage vs. junction temperature fig 12. maximum drain current vs. case temperature fig 10. typical source-drain diode forward voltage fig11. maximum safe operating area fig 14. maximum avalanche energy vs. drain current 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v sd , source-to-drain voltage (v) 0 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 150c t j = 25c t j = -40c v gs = 0v 25 50 75 100 125 150 t c , case temperature (c) 0 2 4 6 8 10 12 14 16 18 i d , d r a i n c u r r e n t ( a ) -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 t y p i c a l v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 50a i d = 100a i d = 250a i d = 1.0ma i d = 1.0a 25 50 75 100 125 150 starting t j , junction temperature (c) 0 10 20 30 40 50 60 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 3.8a 5.4a bottom 13a 0.10 1.00 10.00 100.00 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) t a = 25c t j = 150c single pulse 100sec 1msec 10msec

6 www.irf.com fig 15a. gate charge test circuit fig 15b. gate charge waveform fig 16b. unclamped inductive waveforms t p v (br)dss i as fig 16a. unclamped inductive test circuit fig 17b. switching time waveforms fig 17a. switching time test circuit r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs v dd v ds l d d.u.t + - second pulse width < 1s duty factor < 0.1% vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 1k vcc dut 0 l s 20k v ds v gs 90% 10% t d(off) t d(on) t f t r

www.irf.com 7 directfet substrate and pcb layout, sq outline (small size can, q-designation). please see directfet application note an-1035 for all details regarding the assembly of directfet. this includes all recommendations for stencil and substrate designs. fig 18.

for hexfet power mosfets

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p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period
+ - + + + - - - ? ?
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g = gate d = drain s = source dd d d gs

8 www.irf.com directfet outline dimension, sq outline (small size can, q-designation). please see directfet application note an-1035 for all details regarding the assembly of directfet. this includes all recommendations for stencil and substrate designs. directfet part marking line above the last character of the date code indicates "lead-free" code a b c d e f g h j k l m r p imperial min 4.75 3.70 2.75 0.35 0.48 0.48 0.88 0.78 n/a 0.93 2.00 0.616 0.020 0.08 max 4.85 3.95 2.85 0.45 0.52 0.52 0.92 0.82 n/a 0.97 2.10 0.676 0.080 0.17 min 0.187 0.146 0.108 0.014 0.019 0.019 0.035 0.031 n/a 0.037 0.079 0.0235 0.0008 0.003 metric dimensions max 0.191 0.156 0.112 0.018 0.020 0.020 0.036 0.032 n/a 0.038 0.083 0.0274 0.0031 0.007

www.irf.com 9 data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 02/07 directfet tape & reel dimension (showing component orientation). loaded tape feed direction min 7.90 3.90 11.90 5.45 4.00 5.00 1.50 1.50 note: controlling dimensions in mm code a b c d e f g h max 0.319 0.161 0.484 0.219 0.165 0.205 n.c 0.063 min 0.311 0.154 0.469 0.215 0.158 0.197 0.059 0.059 max 8.10 4.10 12.30 5.55 4.20 5.20 n.c 1.60 dimensions metric imperial standard option (qty 4800) min 330.0 20.2 12.8 1.5 100.0 n.c 12.4 11.9 code a b c d e f g h max n.c n.c 13.2 n.c n.c 18.4 14.4 15.4 min 12.992 0.795 0.504 0.059 3.937 n.c 0.488 0.469 max n.c n.c 0.520 n.c n.c 0.724 0.567 0.606 metric imperial tr1 option (qty 1000) imperial min 6.9 0.75 0.53 0.059 2.31 n.c 0.47 0.47 max n.c n.c 12.8 n.c n.c 13.50 12.01 12.01 min 177.77 19.06 13.5 1.5 58.72 n.c 11.9 11.9 metric max n.c n.c 0.50 n.c n.c 0.53 n.c n.c reel dimensions note: controlling dimensions in mm std reel quantity is 4800 parts. (ordered as irf6712trpbf). for 1000 parts on 7" reel, order irf6712tr1pbf

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